Publications

Books & Book Chapters

  1. C. Seiculescu, S. Murali, L. Benini, and G. De Micheli. “3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks”. Book chapter in: “3D Integration for NoC-based SoC Architectures” by Abbas Sheibanyrad, Axel Janstch, and Frederic Petrot, Springer 2011.
  2. C. Seiculescu, S. Murali, L. Benini, and G. De Micheli. “Design and Analysis of NoCs for Low Power 2D and 3D SoCs”.Book chapter in: “Low Power Networks-on-Chip” by Cristina Silvano, Marcello Lajolo and Gianluca Palermo
  3. C. Seiculescu, “Design Framework and Methodology for Synthesis of Networks-On-Chip”, VDM Verlag, EAN: 9783639241655, ISBN: 3639241657

Journal

  1. C. Seiculescu, S. Murali, L. Benini, and G. De Micheli. “SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3D Systems on Chip”. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume: 29, Issue: 12, Publication Year: 2010 , Page(s): 1987- 2000
  2. C. Seiculescu, S. Murali, L. Benini, and G. De Micheli. “Comparative Analysis of NoCs for Two-Dimensional Versus Three-Dimensional SoCs Supporting Multiple Voltage and Frequency Islands”. IEEE Transactions on Circuits and Systems II: Express Briefs, 57(5):364 – 368, 2010.
  3. C. Seiculescu, D. Rahmati, S. Murali, L. Benini, G. De Micheli and H. Sarbazi-Azad. “Desining Best Effort NoCs to Meet Hard Latency Constraints”, ACM Transactions on Embedded Computers and Systems (TECS)12(4): 108:1-108:23 (2013)
  4. Ciprian Seiculescu, Ioan Lie, Aurel Gontean, “PWM encoding method for wireless communication in sensor networks”, WSEAS TRANSACTIONS on CIRCUITS AND SYSTEMS 2008.

Conference & Workshop

  1. Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Ciprian Seiculescu, Vasilis F. Pavlidis, Giovanni De Micheli: “3.5-D integration: A case study”. ISCAS 2013: 2087-2090
  2. C. Seiculescu, L. Benini, and G. De Micheli. “A Distributed Interleaving Scheme for Efficient Access to WideIO DRAM Memory”, CODES+ISSS’12, October 7-12, 2012, Tampere, Finland.
  3. Volos, S. Seiculescu, C. ; Grot, B. ; Pour, N.K. ; Falsafi, B. ; De Micheli, G. “CCNoC: Specializing On-Chip Interconnects for Energy Efficiency in Cache-Coherent Servers”, Sixth IEEE/ACM International Symposium on Networks on Chip (NoCS), 2012
  4. C. Seiculescu, S. Murali, L. Benini, and G. De Micheli. “A DRAM Centric NoC Architecture and Topology Design Approach”, ISVLSI 2011
  5. C. Seiculescu, S. Volos, N. Khosro Pour, B. Falsafi, G. De Micheli.“CCNoC: On-Chip Interconnects for Cache-Coherent Manycore Server Chips”, WEED 2011
  6. Giovanni De Micheli, Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Federico Angiolini, Antonio Pullini: “Networks on Chips: from research to products”. DAC 2010: 300-305
  7. C. Seiculescu, S. Murali, L. Benini, and G. De Micheli. “A Method to Remove Deadlocks in Networks-on-Chips with Wormhole Flow Control”. In DATE 2010, 2010
  8. Mohammad Reza Kakoee, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Ciprian Seiculescu, Luca Benini: “A floorplan-aware interactive tool flow for NoC design and synthesis”. SoCC 2009: 379-382
  9. C. Seiculescu, S. Murali, L. Benini, and G. De Micheli. “NoC Topology Synthesis for Supporting Shutdown of Voltage Islands in SoCs”. In DAC 2009, pages 822-825, 2009.
  10. Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli: “SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips”. DATE 2009: 9-14
  11. S. Murali, C. Seiculescu, L. Benini, and G. De Micheli. “Synthesis of Networks on Chips for 3D Systems on Chips”. In Asian and South Pacific Design Automation Conference, ASPDAC 2009, pages 242-247, 2009.
  12. Ciprian Seiculescu, Ioan Lie, Aurel Gontean, “Wireless Communication Techniques for Home Automation Sensors”, 6th WSEAS Int. Conference on Computational Intelligence, Man-Machine Systems and Cybernetics, Tenerife, Spain, December 14-16, 2007

PhD Thesis

Design Methods and Tools for Application-Specific Predictable Networks-on-Chip THÈSE NO 5407 (2012) ÉCOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE

Patents

  1. Apparatus and Method for Recording Data Associated with a Vehicle 16709364.0-1953
  2. Method and Device for Detecting a Braking Application of a Vehicle 15465562.5-1901

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